Senior Design Verification Engineer
Bengaluruonsitesenior
Posted 5 days ago · via Workday
About this role
Job Details: Job Description: Job Description Job Description: We are seeking a talented and motivated IP Verification Engineer to join our team. In this role, you will be instrumental in ensuring the functional correctness and quality of our IP blocks for use in complex SoCs (System on a Chip) and FPGAs (Field Programmable Gate Arrays). You will collaborate closely with architecture, design, software, and validation teams to achieve first-pass success. Qualifications: Key Responsibilities Collaborate with architects and design engineers to understand IP specifications and define comprehensive verification strategies and detailed test plans. Develop robust, reusable, and constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology) .…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: python, perl, teams
2
Level fit
This role is senior-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in Bengaluru. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
pythonperlteams
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